异构多处理器系统Cache一致性解决方案  

A Solution of Cache Coherence in Heterogeneous Multi-processor Systems

作　　者：田芳[1,2] 姜秀柱[1] 王书芹[1] 李娜[1,2] 

机构地区：[1]中国矿业大学,徐州221008 [2]天水师范学院,741000

出　　处：《微计算机信息》2008年第29期126-128,共3页Control & Automation

摘　　要：SoC技术的发展使多个异构的处理器集成到一个芯片成为可能,这种结构已成为提高微处理器性能的重要途径。与传统的多处理器系统一样,Cache一致性问题也是片内异构多处理器系统必须首先解决的问题。本文在分析Cache一致性问题的基础上,对采用不同监听协议的多处理器的集成,以牺牲简单的硬件为代价来完成一致性协议的转化。将此方法并入多处理器芯片封装内来管理,可保证在异构多处理器系统中数据的一致性。The development of SoC technology make many heterogeneous processor integrated go to a chip become possibility. This structure has become an important way to improve performance of microprocessors.An important issue in integrating multiple heterogeneous processors on the same chip is to maintain the coherence of their data caches. In this paper, we discuss the cache coherence, with the sacrificing of simple hardware to completed the transformation of coherence protocol for adopting different snoopy protocol. The method can be incorporated in the wrapper to manage the data coherence among heterogeneous processors.

关 键 词：异构多处理器系统 CACHE一致性 监听协议 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]