低噪声和高增益CMOS下变频混频器设计  被引量:5

Design of a Low-Noise and High-Gain CMOS Down-Conversion Mixer

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作  者:王良坤[1] 马成炎[2] 叶甜春[1] 

机构地区:[1]中国科学院微电子研究所,北京100029 [2]杭州中科微电子有限公司,杭州310053

出  处:《微电子学》2008年第5期674-678,共5页Microelectronics

基  金:国家高技术研究发展(863)计划资助项目(2007AA12Z344)

摘  要:设计并实现了一个用于GPS接收机射频前端的CMOS下变频混频器。基于对有源混频器的噪声机制的物理理解,电路中采用了噪声消除技术,以减少Gilbert型混频器中开关管的闪烁噪声,并引入一个额外的电感与开关对共源节点的寄生电容谐振,改善整个电路的噪声系数和转换增益等关键性能指标。电路采用TSMC0.25μm RF CMOS工艺实现,SSB噪声系数为7dB,电压转换增益为10.4dB,输入1dB压缩点为-22dBm,且输入阻抗匹配良好,输入反射系数为-17.8dB。全差分电路在2.5V供电电压下的功耗为10mW,可满足GPS接收机射频前端对低噪声、高增益的要求。A CMOS down-conversion mixer for RF front-end of GPS receiver was designed and implemented. Based on the physical understanding of noise mechanisms in active mixers, a noise cancellation technique to reduce flicker noise contribution of switches in a Gilbert-type mixer was presented, and an extra inductor was introduced to produce resonance with parasitic capacitor of the common source, which improved the performance of key parameters,such as noise figure and conversion gain. Implemented in TSMC's 0. 25 /,m RF CMOS technology, the circuit achieved a single-side band (SSB)noise figure of 7 dB, a total voltage conversion gain of 10. 4 dB, an input 1 dB compression point of -22 dBm, an Sn of -17, 8 dB, and well-matched input impedances. The fully differential circuit dissipated 10 mW of power from a 2.5 V supply.

关 键 词:CMOS 射频集成电路 下变频混频器 GPS接收机 

分 类 号:TN773[电子电信—电路与系统]

 

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