ZVS开关电源中的谷底检测电路设计  

Design of Valley Detection Circuit in ZVS SMPS

作　　者：宗强[1] 吴晓波[1] 陈海[1] 郝炳贤[1] 

机构地区：[1]浙江大学信息工程学院,杭州310027

出　　处：《微电子学》2008年第5期735-739,共5页Microelectronics

基　　金：国家自然科学基金资助项目(90707002);浙江省自然科学基金资助项目(Z104441)

摘　　要：基于反激式DC-DC变换器拓扑,设计了一种精确的谷底检测电路,可以在比较宽的频率范围内检测到电压谷底。同时,为解决高频谐振条件下器件延时给检测精度带来的影响,引入一个迟滞比较器,通过调节其迟滞窗口来抵消延时。该电路已在1.5μm BCD工艺下设计完成。测试结果表明,电路工作正常,预期的功能均已实现。A novel valley detection circuit for flyback DC-DC converter was proposed, which could accurately detect the voltage valley over a wide frequency range. In order to reduce the loss in detection accuracy caused by device delay at high frequency, a special hysteresis comparator was introduced with the programmable hysteresis window. The valley detection module was designed and fabricated in 1.5 μm BCD process. Test results showed that the circuit operated properly, and its main performances were as good as anticipated.

关 键 词：零电压开通 谷底检测 反激式DC-DC变换器 BCD工艺 

分 类 号：TN432[电子电信—微电子学与固体电子学]