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出 处:《Chinese Physics B》2008年第10期3565-3573,共9页中国物理B(英文版)
基 金:Project supported by the Shanghai Pujiang Programme and the National Basic Research Programme of China (Grant No 2006CB921202)
摘 要:We investigate a planar ion chip design with a two-dimensional array of linear ion traps for scalable quantum information processing. Qubits are formed from the internal electronic states of trapped ^40Ca^+ ions. The segmented electrodes reside in a single plane on a substrate and a grounded metal plate separately, a combination of appropriate rf and DC potentials is applied to them for stable ion confinement. Every two adjacent electrodes can generate a linear ion trap in and between the electrodes above the chip at a distance dependent on the geometrical scale and other considerations. The potential distributions are calculated by using a static electric field qualitatively. This architecture provides a conceptually simple avenue to achieving the microfabrication and large-scale quantum computation based on the arrays of trapped ions.We investigate a planar ion chip design with a two-dimensional array of linear ion traps for scalable quantum information processing. Qubits are formed from the internal electronic states of trapped ^40Ca^+ ions. The segmented electrodes reside in a single plane on a substrate and a grounded metal plate separately, a combination of appropriate rf and DC potentials is applied to them for stable ion confinement. Every two adjacent electrodes can generate a linear ion trap in and between the electrodes above the chip at a distance dependent on the geometrical scale and other considerations. The potential distributions are calculated by using a static electric field qualitatively. This architecture provides a conceptually simple avenue to achieving the microfabrication and large-scale quantum computation based on the arrays of trapped ions.
关 键 词:ion traps ion chip quantum information processing
分 类 号:TN402[电子电信—微电子学与固体电子学] O413.1[理学—理论物理]
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