A 10bit 50MS/s Pipeline ADC Design for a Million Pixels Level CMOS Image Sensor  

用于百万像素级CMOS图像传感器的10位50MS/s流水线ADC设计(英文)

作　　者：朱天成[1] 姚素英[1] 袁小星[1] 李斌桥[1] 

机构地区：[1]天津大学电子信息工程学院,天津300072

出　　处：《Journal of Semiconductors》2008年第10期1939-1946,共8页半导体学报（英文版）

基　　金：国家自然科学基金(批准号:60576025);天津市自然科学基金重点项目(批准号:07JCZDJC10400)资助~~

摘　　要：Noise and mismatch are important error sources in pipeline ADCs,so careful calculation and system simulation are carried out using Matlab software. To reduce power consumption while not lose performance, the amplifiers with the same structure are biased with one bias circuit, and a cascode compensation is adopted. A 10bit 50MS/s pipeline ADC, which can be used in CMOS image sensor systems with large pixel array,is designed and tested by using 0.35tzm 4M-2P CMOS process. According to test results, power consumption is only 42mW and SINAD is 45.69dB when sampling frequency is 50MHz. A balance between performance and power consumption is achieved.噪声和不匹配是流水线ADC中的重要误差源,采用Matlab软件对它们进行了计算和系统仿真.为了在没有降低表现的情况下控制功耗,采用了相同结构放大器共用相同的偏置电路技术,并且采用了共源共栅补偿技术来降低功耗.还设计并且测试了一个可用于大像素规模CMOS图像传感器系统的10位50MS/s流水线ADC原型.根据测试结果,当采样频率为50MHz时功耗仅为42mW,SINAD为45.69dB.设计在表现和功耗上取得了很好的平衡.

关 键 词：pipeline ADC CMOS image sensor noise and mismatch suppress low power consumption design 

分 类 号：TP205[自动化与计算机技术—检测技术与自动化装置] TN792[自动化与计算机技术—控制科学与工程]