基于CPLD的正交计数器的实现  

The realization of orthogonal counter circuit based on CPLD

作　　者：韩军[1] 常瑞丽[2] 史文浩[3] 

机构地区：[1]内蒙古科技大学机械工程学院,包头014010 [2]内蒙古科技大学信息工程学院,包头014010 [3]西安理工大学机仪学院,西安710048

出　　处：《现代制造工程》2008年第10期31-33,共3页Modern Manufacturing Engineering

摘　　要：介绍数控系统中基于复杂可编程逻辑器件(Complex Programable Logic Device,CPLD)的正交计数器的实现。实验所用的CPLD器件为Altera公司开发的EPM7128SLC84-15,采用MAX+plusⅡ编程环境,通过原理图输入法对其进行开发,精确实现了四倍频鉴向及30位的计数功能,大大减少数控系统内分立元件的使用,同时增强系统的抗干扰能力,降低了开发成本,具有一定的实用价值。Orthogonal Counter Circuit based on CPLD is introduced in numerical control system. The CPLD in the experiment is Ahem corporation＇ s EPM7128SLC84-15. The programmed software is MAX ＋ plus Ⅱ. Through the development of the input method of principle diagram, fourfold frequency and the function to 30 bits counting are achieved precisely. By this experiment, separating elements are reduced greatly in numerical control system, and the ability of anti-jamming is enhanced, and the costs is lowered. The experiment has a certain useful value.

关 键 词：复杂可编程逻辑器 数控系统 四倍频鉴向电路 30位计数电路 

分 类 号：TP332.12[自动化与计算机技术—计算机系统结构]