基于MIPS体系的扩展指令融合技术  

Instruction Fusion Technology for the MIPS

作　　者：陈文智[1] 姜振宇[1] 吴帆[1] 

机构地区：[1]浙江大学计算机科学与技术学院,杭州310027

出　　处：《计算机学报》2008年第11期1888-1897,共10页Chinese Journal of Computers

摘　　要：MIPS作为RISC体系的典型代表,不能避免代码密度不高和指令域的有效利用程度低的缺陷,使得程序体积膨胀.文中将MIPS指令集扩展为exMIPS ISA,并提出一种基于MIPS体系的指令融合技术.它在解码阶段对预取指令扫描并转换成exMIPS ISA,将符合融合条件的相邻两条或多条exMIPS ISA指令压缩合并.一条"融合指令"的执行,等效于多条被融合的指令同时发射执行,不仅提升了CPU性能,也提升了指令域的有效利用率和代码密度.SimpleScalar模拟平台的实验结果显示可获得较大的性能提升.As a typical representative of RISC architecture,MIPS has the problem of low code density and ineffective utilization of instruction fields,making procedure volume expansion.The authors made some extensions to the existing MIPS Instruction Set,called exMIPS ISA.The authors propose an instruction fusion technology for the MIPS architecture.The pre-fetched instructions was converted into exMIPS ISA,and multiple sequential instructions was compressed and merged into a single instruction when meeting the fusion-condition.A fused instruction′s execution is equivalent to multiple instructions running at the same time,and will gain extra CPU performance.The process of instruction fusion also enhances the effective utilization of the instruction fields and improves code density.Experimental results from SimpleScalar simulation platform show that great improvement can be achieved.

关 键 词：指令融合 代码压缩 MIPS指令集扩展 指令级并行 SIMPLESCALAR 

分 类 号：TP314[自动化与计算机技术—计算机软件与理论]