基于FPGA的GPS相关器改进方案  

Improved Scheme of GPS Correlator Based on FPGA

作　　者：张丹[1] 赵勇[1] 

机构地区：[1]北京大学深圳研究生院信息工程学院,广东深圳518055

出　　处：《现代电子技术》2008年第22期175-177,共3页Modern Electronics Technique

摘　　要：在GPS芯片或者其他信号处理芯片中,经常需要做移动相位进行相关的运算,用硬件来实现这样的运算是相当耗资源的,但有时候也不可避免。基于此,在传统的采取循环移位寄存器存储数据并且移位来进行相关运算的基础上提出一种新的方案,考虑到FPGA有大量现成的Block RAM可以利用,所以采用Block RAM来存储数据并且通过改变Block RAM地址来进行相关运算,理论和实践证明,该方法达到了同样的目的并且更加经济有效,节省了大量资源。In the GPS chip or other signal processing chips, some mobility of phase to correlate operation, sometimes, it is quite wasteful and inevitable to use the hardware realize the operation. A new scheme based on the traditional idea which uses the cycle shift registers to store data and shift the phase to do correlate operation. Considering the abundant free Block RAM in FPGA,the Block RAM is used to store our data and change the address of the Block RAM to do some correlate operation. Theory and experiment prove that this method is right and more economic and proficient, as well as saving abundant resource.

关 键 词：循环移位寄存器 FPGA BLOCK RAM GPS 

分 类 号：TP368.1[自动化与计算机技术—计算机系统结构]