一种基于IP内核的PCI总线接口设计方法研究  

Design and Implementation of PCI Bus Interface Based on IP Kernel

作　　者：张伟栋[1] 王国庆[1] 崔红利[1] 

机构地区：[1]中国航空计算技术研究所,陕西西安710068

出　　处：《航空计算技术》2008年第5期115-118,共4页Aeronautical Computing Technique

摘　　要：PCI总线是数据处理器访问和管理系统资源核心部件,为处理器提供数据采集、信息访问和资源管理的有效途径。针对PCI总线协议的复杂性、以及PCI总线管理的需求,采用PCI Core内核技术,使用FPGA进行64位、66M的PCI总线接口设计,将可重用PCI Core和PCI用户应用设计集成在一个FPGA芯片中,实现PCI总线的管理,并通过对顶层文件的仿真,检测设计功能的正确性。该方法降低了设备的成本,缩短开发周期,给用户设计提供了很大的灵活性。仿真结果表明,PCICore和用户应用设计功能正确,能够满足设计要求。PCI bus is an important component of data processor accessing and managing system resources,and it can provide effective ways for processor to collect data, access information and manage resources. According to complexity of PCI bus protocol and requirement of managing PCI Bus,The paper designs 64-bit,66MHz PCI Bus interface making use of PCI Core Kernel technology and using FPGA. The design integrates the reusable PCI Core and PCI user application in one FPGA chip,and implements managing PCI Bus. The correctness of designing function can be checked through simulating the top- level file. Using this method can decrease cost of equipments, shorten the period of research, and implement PCI user application flexibly. Result of simulation indicates that function of PCI Core and PCI user application is correct, and this method can satisfy designing requirement.

关 键 词：PCI CORE PCI总线 FPGA IP 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]