基于AMBA总线的SoC事务级错误敏感性建模和分析  

Transaction-Level Error Susceptibility Model and Analysis for AMBA Bus Architecture

作　　者：姜大力[1,2] 张小林[1,2] 杨根庆[1] 李华旺[1] 

机构地区：[1]中国科学院上海微系统与信息技术研究所,上海200050 [2]中国科学院研究生院,北京100039

出　　处：《计算机测量与控制》2008年第11期1714-1717,共4页Computer Measurement &Control

基　　金：上海市科委国际合作项目资助(052207046)

摘　　要：随着总线频率以及总线负荷的增加,基于总线的系统可靠性问题就必须引起重视;提出了详细的分析基于AMBA(Advanced Microcontroller Bus Architecture)总线的系统的事务级的错误敏感性模型和系统级敏感性预测方法,通过详细的实验,确定了单比特错误在不同的事务中对总线的影响,确定了总线系统中的需要被保护的关键信号,可以帮助选择合理的错误保护机制;结果显示基于预测的策略与仿真结果在所有的基准程序中平均具有90%的一致性。Increasing bus frequencies and the load on the bus calls for focus on reliability issues in bus based systems. In this paper, provide a detailed analysis the error susceptibility for an AMBA bus based systems. With elaborate experiments determined the effect of a single bit error on the system during the course of different transactions. The work demonstrates the fact that only a few signals in a bus system are really critical and need to be protected. Such transaction based analysis helps us to develop an effective prediction methodology. The results demonstrate that transaction based prediction scheme works with an average accuracy of 90% over all the benchmarks when compared with the actual simulation results.

关 键 词：AMBA 错误敏感性 事务 

分 类 号：TH873.7[机械工程—仪器科学与技术]