基于Simulink的∑△调制器的非理想性建模  

Modeling Sigma-delta Modulator Non-Idealities in SIMULINK

作　　者：刘松[1] 王宗民[2] 肖杜[2] 陈雷[2] 

机构地区：[1]西安理工大学电子工程系,西安710054 [2]北京微电子技术研究所,北京100076

出　　处：《微处理机》2008年第5期32-35,共4页Microprocessors

摘　　要：基于Simulink的系统级模型有助于分析开关电容ΣΔ调制器的各种非理想特性,包括时钟抖动、MOS开关噪声、运算放大器的输入参考噪声、有限直流增益、压摆率和比较器的迟滞性等。为建立各非理想特性与调制器性能之间的关系,对一个非理想特性的5阶单比特ΣΔ调制器进行系统仿真,定量得出各非理想特性对调制器性能的影响。该非理想性系统模型有助于在系统级有效制定出各子模块的性能参数。The system -level models in SIMULINK are presented to analyze the non -idealities of sigma - delta modulator composed by switched - capacitor, including clock jitter, MOS switch noise, input noise of operational amplifier, finite DC gain, slewing rate and hystersis of comparator. For the purpose of establishing the relationship between every non - ideality and performance of sigma - delta, the proposed fifth - order single bit sigma - delta modulator concerning overall non - idealities is simulated, effects of overall non - idealities for the performance of sigma - delta isquantitatively derived. The system level models of overall non - idealities are useful to determine the specifications of the different building blocks in system level.

关 键 词：∑△调制器 非理想特性 A/D转换器 

分 类 号：TN4[电子电信—微电子学与固体电子学]