声码器中一种四级可重构ALU的研究与设计  

Research and Design of a Four-stage Reconfigurable ALU in Vocoder

作　　者：荆涛[1] 王沁[1] 

机构地区：[1]北京科技大学信息工程学院,北京100083

出　　处：《小型微型计算机系统》2008年第12期2277-2280,共4页Journal of Chinese Computer Systems

基　　金：国家自然科学基金项目(60572081)资助

摘　　要：在面向语音编解码算法实现的高性能声码器设计中,支持可变长VLIW指令集的ALU单元是实现其设计目标的重要环节.本文提出一种四级可重构的ALU设计,以前缀算法加法器为核心,并通过操作数和资源的重构,能在单周期内完成81种复合算术逻辑运算,同时将其控制编码压缩了58.93%以适应指令集的宽度约束,高效实现了算法中潜在的高并行性,很好的满足了运算密集型的算法应用需求.In the design of high performance vocoder based on speech compressing algorithms,the ALU module is essential for its design goal. This paper proposes the design techniques of a four-stage reconfigurable ALU based on the 8-bit adders using prefix algorithm. The ALU can manipulate 81 kinds of compound arithmetic and logic operations in a single cycle via operands and resources reconfiguration, and by using coding compression, its control codes can be reduced by 58.93%, which meets the variable length VLIW instruction-set＇s restriction. According to the simulation results, the proposed ALU meets the need of arithmetic intensive applications and implements the parallelism in the algorithms effectively.

关 键 词：声码器 算术逻辑运算单元 可重构 并行性 

分 类 号：TP368[自动化与计算机技术—计算机系统结构]