一种基于JTAG的SOC测试电路设计及实现  

A SOC Test Circuit Design and Implement Based on JTAG

作　　者：郑晓光[1] 白国强[1] 

机构地区：[1]清华大学微电子学研究所清华信息技术国家实验室(筹),北京100084

出　　处：《微电子学与计算机》2009年第1期187-189,192,共4页Microelectronics & Computer

基　　金：国家"八六三"计划项目(2006AA01Z415)

摘　　要：提出了一种基于JTAG的新的测试电路设计思路.通过扩展JTAG指令,可以利用JTAG通信协议向SOC芯片中下载自定义的测试指令,并读回测试的最终结果.该方法可以对SOC内部的IP及存储器进行充分的功能测试,测试过程可灵活配置,可以快速定位测试中出现的问题.In this paper, a new test method was presented. This method was based on JTAG protocol. The JTAG instructions were extended and the extended test instructions can be download to SOC through JTAG. The test results can be also feedback through JTAG. The IP and memory in SOC design can be well tested. The test process can be configured flexibly, and the problem occurred in test can be fixed rapidly.

关 键 词：JTAG TAP SOC 测试 可复用IP 

分 类 号：TN407[电子电信—微电子学与固体电子学]