基于ONPC体系结构的软输出球形解码器的VLSI实现  

VLSI Implementation of Soft-output Sphere Detector Based on ONPC Architecture

作　　者：方兴[1] 陈书明[1] 

机构地区：[1]国防科技大学计算机学院,湖南长沙410073

出　　处：《国防科技大学学报》2008年第6期63-67,共5页Journal of National University of Defense Technology

基　　金：国家"863"计划资助项目(2007AA01Z108)

摘　　要：由于球形检测算法的高计算复杂度,能提供软输出信息给后续纠错解码器的球形解码器的VLSI实现是一项挑战。提出了一种基于ONPC体系结构的深度优先搜索的软输出球形解码器的VLSI解决方案。对于采用4×4天线配置和64-QAM调制的MIMO系统,在17.7dB的信噪比下,所提出解决方案在0.13-μm CMOS工艺下能提供14Mbps的吞吐率,面积开销约为4.1mm2,并且BER性能优于幸存路径数为256的基于宽度优先搜索的K-best算法。The efficient high-speed VISI implementations of sphere detector providing soft information for a subsequent error correcting decoder are not trivial due to their high computational complexity. Therefore, a VLSI solution for soft-output sphere detector based on depth-first tree search and ONPC architecture is presented. In a 0.13-μn CMOS process, the proposed detector solution can achieve 14 Mbps at a signal-to-noise ration of 17.7dB for 4 × 4 MIMO system with 64-QAM using only approximately 4.1mm^2, and realize a better BER performance than K-best algorithm with 256 survivor paths based on depth-first search.

关 键 词：多输入多输出 球形解码 空分复用 VLSI 

分 类 号：TN492[电子电信—微电子学与固体电子学]