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机构地区:[1]西北工业大学软件与微电子学院,陕西西安710072 [2]英飞凌科技,陕西西安710075
出 处:《计算机工程与科学》2009年第1期103-106,共4页Computer Engineering & Science
摘 要:在现有主要的循环冗余校验的实现方法中,计算速度和灵活性是一对突出的矛盾。本文提出了一种可同时有效兼顾计算速度和灵活性的可配置并行计算电路结构,给出了此结构的一般化递推公式,并根据IP设计的可重用性要求,使用VHDL语言实现了可配置并行CRC计算模块的RTL级设计和验证;对比和分析了在不同复用配置下电路的综合结果。由仿真和综合结果可知,此电路模块很好地平衡了计算速度和计算灵活性,证明可配置并行计算结构是一种高效可靠的电路结构。Among the varied implementations of the Cyclic Redundancy Check, the conflict between speed and flexibility of calculation is common. This paper presents a configurable parallel structure for CRC calculation, which can highly ensure the flexibility while maintaining the speed of calculation, and also the recursive formula of the parallel structure is given. Then, by using VHDL, a configurable RTL module based on the method is implemented and verified. It is a reusable IP for the communication system where a fast and flexible CRC computation is required enormously. The performance analysis and resource usage with synthesis results are also presented. Simulation results show that the module can excellently balance the speed and flexibility of calculation, and the configurable parallel CRC structure is reliable and efficient.
分 类 号:TP302[自动化与计算机技术—计算机系统结构]
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