基于CPLD的累次双向差动触发器型数字鉴相方法  

Digital phase discrimination method with accumulated dual-direction-differential trigger based on CPLD

作　　者：邬利挺[1] 严利平[1] 杨涛[1] 陈本永[1] 

机构地区：[1]浙江理工大学纳米测量技术实验室,浙江杭州310018

出　　处：《机电工程》2009年第1期63-66,共4页Journal of Mechanical & Electrical Engineering

基　　金：国家自然科学基金资助项目(60575055);浙江省自然科学基金资助项目(Y107556)

摘　　要：为实现高精度数字鉴相,通过对多种鉴相方法的分析,提出了一种新的累次双向差动触发器型数字鉴相方法,等倍增加了原计数脉冲时间间隔,从而有效提高了测量精度;基于复杂可编程逻辑器件(CPLD),设计了累次双向差动触发器型数字鉴相的实现电路。试验结果表明,利用该方法能够得到高精度测量值。Aiming at high accuracy digital phase discrimination, after analyzing various phase discrimination methods, a novel digital phase discrimination method with accumulated dual-direction-differential trigger was presented. The original count pulse interval was increased by equal times, the measurement accuracy was improved effectively. Based on complex programmable logic device （CPLD） technique, the realization circuit of the method was designed. The test results indicate that the method can attain high accuracy measure value.

关 键 词：数字鉴相 触发器 复杂可编程逻辑器件 

分 类 号：TN763.3[电子电信—电路与系统]