低电压、高PSRR的带隙电压基准源  

Low voltage high PSRR band-gap voltage reference

作　　者：徐静萍[1] 

机构地区：[1]西安邮电学院电子与信息工程系,陕西西安710121

出　　处：《西安邮电学院学报》2009年第1期53-56,共4页Journal of Xi'an Institute of Posts and Telecommunications

摘　　要：设计了一款高精度、低电源电压的CMOS带隙基准源,具有良好的电源抑制比。电路采用电流模结构和反馈控制实现了低电压、低功耗和高电源抑制比。基于0.25μm CMOS工艺,测试结果表明:在1V电源电压下,1KHz频率时,电源抑制比约为80dB,在0-70℃温度范围内,输出电压变化率不超过0.3%。A low power and high precision CMOS band- gap voltage reference circuit is presented with high power supply rejection ratio（PSRR）. The proposed circuit uses a regulated current mode structure and feedback loop to reach a low voltage, low power and high PSRR voltage reference. Based on 0.25μm CMOS process, the measured results show that the PSRR is about 80dB at the frequency of 1KHz under the power supply of IV, and the output voltage variation versus temperature ranging from 0℃ to 70℃ is less than 0.3 %.

关 键 词：模拟电路设计 带隙基准源 电源抑制比 低电压 

分 类 号：TN402[电子电信—微电子学与固体电子学]