Design and measurement of a 53 GHz balanced Colpitts oscillator  被引量:1

Design and measurement of a 53 GHz balanced Colpitts oscillator

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作  者:赵衍 王志功 李伟 章丽 

机构地区:[1]Institute of RF-&OE-ICs, Southeast University

出  处:《Journal of Semiconductors》2009年第1期50-53,共4页半导体学报(英文版)

摘  要:A 53 GHz Colpitts oscillator implemented in a SiGe:C BiCMOS technology is presented. Limited by a 26.5 GHz frequency analyzer, the oscillator was measured indirectly through an on-chip mixer. The mixer downconverted the oscillating frequency to an intermediate frequency (IF) below 26.5 GHz. By adjusting the local oscillating (LO) frequency and recording the changes of IF frequency, the oscillator's output frequency (RF) was determined. Additionally, using phase noise theory of mixers, the oscillator's phase noise was estimated as -58 dBc/Hz at 1 MHz offset and the output power was about -21 dBm. The chip is 270 ×480μm in size.A 53 GHz Colpitts oscillator implemented in a SiGe:C BiCMOS technology is presented. Limited by a 26.5 GHz frequency analyzer, the oscillator was measured indirectly through an on-chip mixer. The mixer downconverted the oscillating frequency to an intermediate frequency (IF) below 26.5 GHz. By adjusting the local oscillating (LO) frequency and recording the changes of IF frequency, the oscillator's output frequency (RF) was determined. Additionally, using phase noise theory of mixers, the oscillator's phase noise was estimated as -58 dBc/Hz at 1 MHz offset and the output power was about -21 dBm. The chip is 270 ×480μm in size.

关 键 词:COLPITTS negative resistance OSCILLATOR phase noise 

分 类 号:TN752[电子电信—电路与系统]

 

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