基于FPGA高速数据采集系统控制电路的设计  

The design of the control circuit in high-speed data acquisition system based on FPGA

作　　者：葛远香[1] 金燕[1] 胡开明[1] 

机构地区：[1]浙江工业大学信息工程学院,浙江杭州310032

出　　处：《浙江工业大学学报》2009年第1期96-99,共4页Journal of Zhejiang University of Technology

摘　　要：随着国民经济的发展,电力系统谐波问题日益严重,对电力部门的供电质量提出了更高的要求,为了保证对电力系统进行实时监控、调度,需要对电网的电压电流进行交流采样;介绍了电力系统电压电流交流采样的设计思想,提出了一种用FPGA实现对高速A/D转换芯片的控制电路,系统以MAX125为例,详细介绍了含有FIFO存储器的A/D采样控制电路的设计方法,并给出了A/D采样控制电路的VHDL源程序和整个采样存储的顶层电路原理图.解决了电力系统中多路电压、电流的高速高精度同步交流采样问题.With development of the national economic, harmonics problems in power system become more and more serious. The electricity supply quality in the electricity sector is put forward a higher requirement. In order to ensure the real-time monitoring and scheduling the power system, it is necessary to sample the AC voltage and current in the electric network. The sampling design for VC voltage and current is introduced in this paper. The control circuit in high-speed A/D MAX125chip based on FPGA is proposed. Here, in case of MAX125 chip, the A/D sampling control circuit with FIFO memory is introduced. The VHDL source in A/D sampling control circuit and the top circuit schematics in the entire sample storage are provided. This design solves the high speed and high-accuracy synchronic sampling problems in the multipath voltage and current in electric networks.

关 键 词：FPGA 高速A/D转换 FIFO VHDL语言 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]