印刷电路板供电系磁性材料涂层的应用  

EMI Reduction for Power Bus Structures in PCBs Using Magnetic Material Coating

作　　者：张婧婧[1] 李杰[1] 王志良[1] 

机构地区：[1]复旦大学信息科学与工程学院,上海200433

出　　处：《信息与电子工程》2009年第1期52-55,70,共5页information and electronic engineering

基　　金：国家自然科学基金资助项目(60571051)

摘　　要：印刷电路板(PCB)的电磁兼容问题,随着数字电路的工作频率越来越高而变得尤为重要。本文以印刷电路板中的电源接地层供电系构造为切入点,讨论与其相关的电磁兼容问题。在高频段,印刷电路板的电源和接地层构造相当于一个平行平板谐振器,对周围的电路产生电磁干扰(EMI)。基于全腔模模型,已经发展了用于高效准确计算供电系阻抗的快速算法。利用此算法,通过计算机仿真,结果表明PCB电源接地层导体内侧增加磁性材料涂层能够提高表面阻抗,进而减小端口输入阻抗的谐振峰并改善信号完整性。As the operation frequency of digital circuits on the Printed Circuit Board（PCB） gets higher and higher, its Electro-Magnetic Compatibility（EMC） problems have become more important and can no longer be ignored. In fact, the power-return plane pairs in PCBs must be considered as a parallel-plate waveguide system. Using a fast algorithm, developed for efficient and accurate calculating of the impedance of a power bus structure in muhilayer PCBs, the Electro-Magnetic Interference（EMI） problem from the structure is focused on and it is found that coating the magnetic material onto the inner sides of copper layers used for power/ground planes can significantly contribute to the EMI reduction.

关 键 词：多层印刷电路板 腔模模型 供电系阻抗快速算法 磁性材料 

分 类 号：TN41[电子电信—微电子学与固体电子学]