基于FPGA的正交信号细分系统研究  

A Study of Subdivision System about Orthogonal Signal on FPGA

作　　者：常海涛[1] 叶孝佑[1] 孙双花[1] 高宏堂[1] 张晓[1,2] 

机构地区：[1]中国计量科学研究院,北京100013 [2]中国计量学院,浙江杭州310018

出　　处：《计量学报》2008年第B09期36-39,共4页Acta Metrologica Sinica

摘　　要：介绍了一种新的基于FPGA的纯硬件细分系统，该系统主要由模拟信号处理和集成于同一FPGA芯片上的坐标变换、FIFO存储器、FIR滤波器几个部分组成。采用了集成化和模块化设计，具有精度高、实时性好等特点。将此方法应用于2m比长仪的测长系统，通过实验验证了该细分系统的准确性及实用性。A new subdivision system which is based on the FPGA chip is introduced. The system is mainly made up of four parts： analog signal processing, coordinate transfonnation, FIFO memory and FIR filter. In addition to analog signal processing, the other modules are integrated in the same FPGA chip. Using integrated and modular design, we gain high precision and real - time features. This method has been apphed to length measurement system of AIK. The accuracy and practicability of the interpolation system have been verified by experiments.

关 键 词：计量学 长度计量 信号处理 硬件细分 FPGA芯片 FIR滤波 

分 类 号：TB92[一般工业技术—计量学]