STM-4提取VC-12解复用的FPGA设计  

A FPGA-based Design of Multiplexer to Extract VC-12 from STM-4

作　　者：李鹰[1] 

机构地区：[1]中国电子科技集团公司第三十研究所,四川成都610041

出　　处：《信息安全与通信保密》2009年第3期74-76,共3页Information Security and Communications Privacy

摘　　要：SDH作为当今通信网络重要的传输手段,具有前向和后向兼容性,各种不同速率的PDH信号、B-ISDN和ATM信号及其他新业务信号可通过适配复用进STM-N帧。论文通过对SDH复用原理的研究,提出了一种取代成帧器,基于FPGA的从STM-4提取VC-12解复用的设计方法,并选用Altera公司Stratix ii gx系列FPGA进行方案实现,最后加载到FPGA,在SDH测试仪搭建的环境下,利用QUARTUS II的在线采集工具SignalTap对设计进行了验证。SDH is an important transmission method in communications field, and compatible with signals of various speeds, including PDH, B-ISDN, ATM and other new communication signals. Based on study of the principle of SDH multiplexing, this paper puts forword a method for extracting VC-12 from STM-4 by using FPGA to replace the SDH transport framer. By using FPGA ofAltera Stratix ii GX, the design is realized. The experiment through SignalTap which is a tool of quartus ii for signal testing, indicates that the design is feasible.

关 键 词：复用 SDH PDH FPGA 

分 类 号：TN791[电子电信—电路与系统]