合并单元数字输出接口的研究与设计  

Research and Design of Ethernet Interface at the Merging Unit

作　　者：陈晓明[1] 叶国雄[1] 余春雨[1] 刘彬[1] 毛安澜[1] 

机构地区：[1]国网电力科学研究院,武汉430074

出　　处：《电测与仪表》2009年第3期68-71,共4页Electrical Measurement & Instrumentation

摘　　要：数字化变电站中电子互感器与二次设备的接口依靠合并单元实现,数字量输出接口是合并单元开发的关键点,也是产品检测时的重要项目。本文分析了电子互感器标准和IEC61850-9标准中对数字量输出的要求,并给出合并单元数字量输出帧的实现方案。在此基础上,本文提出了一种基于现场可编程门阵列(FPGA)和数字信号处理(DSP)技术的接口设计方案,详细介绍了硬件和软件设计的方法。试验结果表明,该方案可以很好地应用于合并单元的数字输出。The interface of electronic instrument transformers and secondary equipment is realized by merging unit in the digital substation. The interface design of digital output is the key design on merging unit and the important items for inspection and testing. This paper analyses the digital output requirement according to electronic instrument transformers and IEC61850-9 standard and puts forward to a realization scheme of digital output frame. On this basis, the scheme of interface design based on DSP and FPGA is proposed and the realization method of hardware and software is detailed introduced. Experimental results show that this scheme can be well used in digital output of merging unit.

关 键 词：电子式互感器 合并单元 以太网 RTL8019AS IEC61850—9 

分 类 号：TM93[电气工程—电力电子与电力传动]