嵌入式系统中的低功耗设计研究  

Research on low power for embedded system design

作　　者：王怀瑞 

机构地区：[1]河北省应用数学研究所,河北石家庄050081

出　　处：《河北省科学院学报》2008年第4期23-25,44,共4页Journal of The Hebei Academy of Sciences

摘　　要：在嵌入式系统的设计中,低功耗设计是经常让设计人员头痛而又不得不面对的问题。在嵌入式系统中,其功耗主要由嵌入式微处理器功耗和外围硬件接口设备功耗组成。要降低嵌入式系统的功耗,需要从系统设计的各个方面入手。本文将从电源供给电路、振荡电路、接口电路三个方面来讨论嵌入式系统中的低功耗设计。In the design of embedded system, low-power design is one of the troublesome problems that the designers have to face, In the embedded system, the power consumption mainly consists of the consumption of the embedded microprocessor and the peripheral hardware interface equipment. In or- der to reduce the power consumption of the embedded system, we must consider the design of the system from various aspects. In this paper we will discuss the low-power design in embedded system in three aspects： the power supply circuit, the oscillation circuit and the interface circuit.

关 键 词：嵌入武系统 硬件 低功耗 

分 类 号：TP319[自动化与计算机技术—计算机软件与理论]