一种硬件加速型融合防火墙包处理流程的设计与实现  

Design and Realization of New Packet Processing Flow for Hardware Accelerated Universal Firewall

作　　者：杨赞[1] 程东年[1] 王保进[1] 

机构地区：[1]国家数字交换系统工程技术研究中心,河南郑州450002

出　　处：《计算机与现代化》2009年第4期1-4,共4页Computer and Modernization

基　　金：国家863计划资助项目(2008AA01A323)

摘　　要：针对硬件加速型融合防火墙,在保证其功能完善的基础上,设计并实现了一种可充分发挥系统性能的包处理流程。对各设计要点进行了详细说明并给出了设备性能测试结果。Aimed at hardware accelerated universal firewall, this paper proposes a new packet processing flow which improves the system＇ s performance sufficiently and its complete functions are guaranteed. Detailed description of all design points and equipment＇ s performance testing results are also shown in this paper.

关 键 词：硬件加速 融合防火墙 包处理流程 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]