一种新型两通道时间交织高阶ΣΔ调制器  

Novel two-channel time-interleaved high-order ΣΔ modulator

作　　者：杨骁[1] 陈贵灿[1] 程军[1] 张鸿[1] 

机构地区：[1]西安交通大学电子与信息工程学院,陕西西安710049

出　　处：《西安电子科技大学学报》2009年第2期359-365,共7页Journal of Xidian University

摘　　要：为了减小两通道时间交织ΣΔ调制器中系数失配引起的折叠噪声以及降低调制器实现电路的复杂程度,提出了一种新的两通道时间交织高阶ΣΔ调制器.在传统调制器的噪声传递函数(NTF)中增加一个z为-1的零点,减小了NTF在高频处的幅值,从而减小了折叠到信号带宽内的噪声.以一个传统单通道单环4阶4位前馈分布型ΣΔ调制器结构为原型,运用块数字滤波器基本原理以及时域等效的方法,得到了其两通道时间交织结构的实现电路.该调制器电路前3级的两个通道能够共享运算放大器,减小了有源元器件的数目.对包含了系数失配的调制器进行了建模和仿真,仿真结果表明,该两通道时间交织高阶调制器能够有效地抑制折叠噪声,提高了调制器的性能.To alleviate the folded noise caused by coefficient mismatches between the two channels of two-channel time-interleaved（TI） ΣΔ modulators and simplify the circuit of the modulators,a novel two-channel time-interleaved high-order ΣΔ modulator is proposed.Adding a zero at the frequency of Fs/2 to a conventional noise transfers function（NTF）,the amplitude of the NTF at the high frequency can be reduced,and then the amount of the folded noise is reduced.Based on the theory of block digital filters and the method of timing equivalence,the implemented circuit for the proposed modulator is derived from the prototype of a conventional single-channel single-loop forth-order 4-bit distributed feedforward ΣΔ modulator,in which the opamps can be shared by tow channels of the first three stages,resulting in simplification in hardware complexity.A system model containing coefficient mismatches is built and simulated.Simulation results show that the proposed two-channel TI high-order ΣΔ modulator can alleviate the folded noise and improve the performance.

关 键 词：ΣΔ调制器 折叠噪声 时间交织 块数字滤波器 

分 类 号：TN432[电子电信—微电子学与固体电子学]