12路40Gb/s甚短距离并行光传输信号转换器研究  

Research on signal converter of 12-channel 40Gb/s very short reach parallel optical transmission system

作　　者：刘丰满[1] 陈雄斌[1] 刘博[1] 杨宇[1] 陈弘达[1] 

机构地区：[1]中国科学院半导体研究所集成光电子学国家重点联合实验室,北京100083

出　　处：《高技术通讯》2009年第4期415-420,共6页Chinese High Technology Letters

基　　金：863计划(2006AA01Z239;2007AA01Z2A5);国家自然科学基金(60502005);博士后基金(20070420833)资助项目

摘　　要：基于OIF-VSR5-01.0规范,分析了12路并行40Gb/s甚短距离(VSR)光传输转换器模块的实现原理。采用top-down分析方法,使用硬件描述语言verilog,在可编程逻辑器件上完成了时钟数据恢复、基于字节对齐方案的帧同步、信道去斜移、比特间差奇偶校验(BIP)等功能模块的程序设计,实现了SFI-5与OIF-VSR5-01.0电信号格式的相互转换,并在Altera的StratixⅡGX系列的高速现场可编程门阵列(FPGA)上对功能模块进行了功能验证和联合仿真。结果表明所设计的各个功能模块满足系统应用要求,为下一步将系统设计转换为专用集成电路(ASIC)奠定了基础。The implementation principle of the signal converter of a 12-channel 40 Gb/s very short reach （VSR） parallel optical transmission system was analyzed according to the OIF-VSR5-01.0 agreement. Using the top-down analysis method and the hardware description language verilog, the modules of clock data recovery, byte alignment-based frame synchronism, channel alignment and bit interleaved parity （BIP） were designed on the programmable logic device, the signal transformation between the SFI-5 interface and the OIF-VSR5-01.0 interface was achieved, and the modules were verified and simulated on the high speed field programmable gate array （FPGA） of Altera StratixlI GX series. The simulation re- suits indicate that all the designed modules can meet the requirements of system application, which lay the fotmdation for application specific integrating circuits （ASIC）.

关 键 词：甚短距离(VSR) 转换器 帧同步 去斜移 STM-256 

分 类 号：TN929.11[电子电信—通信与信息系统] TN911.7[电子电信—信息与通信工程]