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作 者:王得利[1] 高德远[1] 张骏[1] 王党辉[1]
出 处:《计算机科学》2009年第5期291-294,298,共5页Computer Science
基 金:国家自然科学基金项目(60573107);国家自然科学基金项目(60573143);国家863项目(2007aa010402);国家十一五研究项目资助
摘 要:LongtiumC2微处理器是西北工业大学自主产权设计的嵌入式32位CISC微处理器,与Intel486DX2完全兼容,工作频率133MHz,规模约100万门,功耗小于1W。在微体系结构方面,提出硬连线和微程序相结合的控制通路设计方案,增强了处理器的灵活性和扩展能力。在流水线方面,为了实现精确中断,提出了基于微操作的指令指针跟踪方案,不但可以精确地保存中断现场,而且省去了等待指令边界的时间,实现了中断的快速响应。为了实现Longti-umC2的低功耗特性,提出了译码控制核心的低功耗设计方案,使译码器和微内核的功耗分别下降26%和19%。最后,为了快速、完备、有效地对LongtiumC2进行功能验证,提出了一种微处理器的系统级验证策略,使用虚拟系统和FPGA来同时搭建系统级验证平台,并采用Vera进行基于功能点的覆盖率验证,提高了验证工作的效率和置信度。LongtiumC2 is an embedded 32 bit Complex Instruction Set Computer microprocessor designed by Northwestern Polytechnieal University, which is compatible with Intel 486DX2 in instruction level, designed to run in 133MHz, and includes about one million gates. Its power consumption is less than one watt. In micro-architecture level, this paper proposed a control logic design scheme, which combined PLA and micro-operation together to improve the flexibility and expansibility of LongtiumC2. In pipeline design, to realize the precise interrupt, this paper proposed an instruction pointer track method based on micro-operation, which leave out the time to wait current instruction's completion,and realize interrupt faster. To implement the low power characteristic for LongtiumC2,this paper proposed a low power design strategy for decode and control core logic,which reduces about 26 % and 19% respectively for decoder unit and micro-core unit. Finally, to verify LongtiumC2 fast, completely and effectively, this paper proposed a system level verification strategy for microprocessor, which improves the efficiency and confidence of verification by constructing two kinds of system level verification platform for LongtiumC2 microprocessor using virtual system and FPGA, and proce- ssing a function points based coverage verification with Vera.
分 类 号:TP302[自动化与计算机技术—计算机系统结构]
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