一种基于FPGA带限数字噪声发生电路的设计  

The Design of Bandwidth Limited Digital Noise Generator Based on FPGA

作　　者：李成[1] 

机构地区：[1]中国电子科技集团公司第41研究所,安徽蚌埠233006

出　　处：《电子质量》2009年第5期68-70,共3页Electronics Quality

摘　　要：介绍了一种基于FPGA带限噪声发生电路的结构和实现。该数字噪声信号发生电路采用数字方法生成基带噪声序列,并加入数字低通滤波,可在线修改噪声带宽和幅度。使用方便灵活,并且具有很好的可扩展性。This paper introduces the architecture and realization of a bandwidth limited digital noise generator based on FPGA. It adopts the digital method,which can produces baseband noise sedquence that includes digital low-pass filter and it also can update the noise bandwidth and amplitude at any moment. This noise generator is flexible and easy to use and has good extensibility.

关 键 词：基带噪声 高斯白噪声 带限 幅度 

分 类 号：TN791[电子电信—电路与系统]