基于CPLD的晶闸管脉冲触发器的设计  

Design of Pulse Triggers Thyristor Based on the CPLD

作　　者：徐莉[1] 苏楠[1] 

机构地区：[1]天津电气传动设计研究所,天津300180

出　　处：《电气传动》2009年第5期72-75,共4页Electric Drive

摘　　要：通过利用复杂可编程逻辑器件CPLD(Altera公司)及其软件开发平台QuartusⅡ,实现一个三电平变频系统晶闸管整流前端的脉冲触发器。设计了一种可应用于三相晶闸管整流或逆变电路的数字触发电路,该电路以CPLD为核心,产生的触发脉冲稳定性好,可靠性高,同时不需要同步变压器,实现了相序自适应。同时证明了用CPLD设计复杂数字逻辑电路的便捷性。Through the complex programmable logic device CPLD （Altera Corporation） and its software development platform Quartus Ⅱ , the trigger pulse, which is used in the front of three-level inverter system SCR, was realized. The circuit, whose core is CPLD, can be used in three-phase inverter circuit SCR or the number of trigger circuit, can generate the stability, high reliability trigger pulse and achieve a phase adaptive sequence without the synchronize transformers. At the same time, it proves the convenience of using the CPLD to design the complex digital logic circuits.

关 键 词：复杂可编程逻辑器件 数字电路 脉冲触发 

分 类 号：TM461[电气工程—电器]