超高频RFID读写器基带处理器的设计  

Design of an UHF RFID Interrogator Baseband Processor

作　　者：陈逆[1] 张春[1] 王敬超[1] 

机构地区：[1]清华大学微电子所,北京100084

出　　处：《半导体技术》2009年第4期370-374,共5页Semiconductor Technology

基　　金：国家高技术研究发展计划(863计划)(60676012)

摘　　要：为实现单芯片的超高频读写器,提出了一种读写器基带处理器的设计方案。设计采用了微处理器IP核在AFS600上搭建一个读写器数字基带,在原本不支持调试模式的微处理器上扩展了片上调试功能,为集成开发环境Keil开发出动态链接库实现了对数字基带的在线调试。为实现ISO/IEC18000-6C协议,用硬件实现了收发通路原型,并在AFS600平台上完成了FPGA验证。设计采用TSMC0.25μm Embedded Flash工艺完成了芯片的版图设计。该基带处理器实现了读写器基带和标签的正常通信,为最终实现单芯片读写器创造了条件。A novel mechanism of implementing proposed to implement an UHF reader on a single chip. a digital baseband of reader, on-chip debugging an UHF RFID interrogator baseband processor was A microprocessor IP core was used in AFS600 to build was developed in original microprocessor which objects to debugging mode, and a special DLL was developed to realize on-line debugging of baseband processor for IDE Keil. To realize ISO/IEC 18000-6C protocol, a transceiver pathway prototype was implemented by hardware and accomplished FPGA verification on AFS600 platform. Finally, the layout was finished using TSMC 0.25 μm Embedded Flash process. This baseband processor realizes normal communication between interrogator and tag, and is well prepared to achieve a single-chip interrogator.

关 键 词：读写器 ISO/IEC18000-6C 数字基带 在线调试 

分 类 号：TP202[自动化与计算机技术—检测技术与自动化装置] TN43[自动化与计算机技术—控制科学与工程]