DTMB系统全模式信道估计及硬件实现  

Full-mode Channel Estimation and Hardware Implementation for DTMB System

作　　者：潘安[1] 陈赟[1] 陈媛[1] 巫建明[1] 曾晓洋[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203

出　　处：《计算机工程》2009年第11期256-259,共4页Computer Engineering

基　　金：上海市科委基金资助项目"高性能;低功耗抑制长回波干扰信道估计算法及其VLSI实现"(08700741100)

摘　　要：提出一种应用于全模式DTMB解调器的信道估计及均衡实现方案。该方案利用DTMB系统帧结构中的PN序列,可以同时支持3种帧头模式及单多载波2种传输模式的信道估计及均衡。为易于硬件实现,对迭代干扰消除进行简化处理,并对信道均衡及信道冲击响应的滤波进行优化。给出一种硬件实现架构,兼顾性能和复杂度。仿真结果表明,简化后的算法几乎没有造成性能损失。This paper developes a full-mode channel estimation for DTMB demodulator. The method utilizes the quasi-cyclic structure of PN sequence guard interval in DTMB system to obtain channel estimation and equalization both in three kinds of frame head mode as well as in single and multi-carrier modulation transmission mode. To implement on hardware, interference cancellation is predigested, equalization and filter for channel impulse response are optimized. The VLSI architecture for channel estimation and equalization is proposed which works effectually and achieves low complexity as well. Computational simulation results show that the proposed scheme has little BER loss in performance.

关 键 词：DTMB系统 PN序列 信道估计 全模式 硬件架构 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]