一种高速帧同步和相位模糊估计的方法及其FPGA实现  

Method and Its FPGA Implementation for High Data Rate Frame Synchronization and Estimation of Phase Ambiguity

作　　者：满欣[1] 杨军[1] 张尔扬[1] 

机构地区：[1]国防科技大学电子科学与工程学院,湖南长沙410073

出　　处：《现代电子技术》2009年第11期37-40,共4页Modern Electronics Technique

摘　　要：提出仅依靠接收符号和本地同步码快速确定MPSK调制符号的帧同步,并同时估计其相位模糊值的计算方法,给出减少一半计算量的简化相关算法以及设定两个门限的方法,并分析该同步器的性能。详细设计能估计相位模糊值的高速帧同步器的结构,通过FPGA实现验证算法在高达320 MSPS的8PSK符号速率时均可以有效工作。An algorithm to perform frame synchronization and estimation of phase ambiguity of MPSK modulated symbols is presented,with the method of setting two thresholds and a simplified correlation which can reduce half the computing complexity,and performance of the synchronizer are analyzed. The architecture of high data rate frame synchronizer which can estimate the phase ambiguity is designed, and the results of FPGA implementation prove that it can work effectively while data rate of 8PSK symbols is 320 Ms/s.

关 键 词：MPSK调制符号 帧同步 相位模糊 高速调制 

分 类 号：TN91[电子电信—通信与信息系统]