一种改进型8位50 MSPS流水逐次逼近A/D转换器  

An Improved 8-Bit 50 MSPS Pipelined Successive Approximation A/D Converter

作　　者：阳广[1] 王百鸣[2] 李昆华[2] 单宝忠[1] 

机构地区：[1]深圳大学光电子学研究所,广东深圳518060 [2]深圳大学信息工程学院EDA技术中心,广东深圳518060

出　　处：《微电子学》2009年第3期311-314,319,共5页Microelectronics

基　　金：国家自然科学基金重大研究计划面上项目(90407001);深圳市科技计划项目

摘　　要：通过理论分析和实验仿真,提出了一种基于流水线技术的逐次逼近型ADC,分析了电路原理和电路结构;阐述了如何通过流水结构来提高逐次逼近型ADC的性能。相关测试表明,设计的A/D转换器最高转换速度为50MSPS;在0.5MHz输入信号下的信噪谐波比为45.7dB,在4.0MHz输入信号下的信噪谐波比为31.6dB。Based on theoretical analysis and experimental simulation, an improved pipeline-basect successive approximation A/D converter was presented. The principle and structure of the circuit was analyzed. Techniques to improve the performance of A/D converter with pipelined circuit structure were illustrated. Test results showed that the proposed A/D converter had a maximum sampling rate up to 50 MSPS, an SINAD of 45.7 dB and 31.6 dB at 0. 5 MHz and 4. 0 MHz input signals, respectively.

关 键 词：A/D转换器 采样保持器 流水线结构 

分 类 号：TN792[电子电信—电路与系统]