低功耗高速流水线ADC中低回踢噪声动态比较器设计  

Design of Low Kickback Noise Dynamic Comparator for Low-Power High-Speed Pipeline A/D Converter

作　　者：王任[1] 戴庆元[1] 许洁皓[1] 

机构地区：[1]上海交通大学微纳科学技术研究院,上海200240

出　　处：《电子器件》2009年第2期332-334,共3页Chinese Journal of Electron Devices

摘　　要：动态比较器是低功耗高速流水线ADC的重要模块,其回踢噪声会严重影响ADC的性能。为了满足低功耗高速流水线ADC的应用需求,设计了一种全差分结构的动态比较器,具有零静态功耗、速度快、阈值电压可调等特点。中和技术的应用可以显著降低回踢噪声。电路使用TSMC 0.18μmCMOS工艺,在1.8 V电源电压和100 MHz工作频率下,仿真显示回踢噪声被明显抑制,减小了75.5%。Dynamic comparator is one important building block of low-power high-speed pipeline analog-todigital converter （AIX2）. Kickback noise contributed by comparator has a critical effect on the performance of ADC. A fully-differential dynamic comparator with characters such as zero static power consumption, high speed and adjustable threshold voltage was designed for low-power high-speed pipeline ADC. The application of neutralization technique achieves remarkable progress on kickback noise reduction. Based on TSMC 0. 18μm CMOS process, the circuit operated at 100 MHz frequency with 1.8 V supply voltage. Simulation demonstrates that kickback noise is greatly reduced and it decreases by 75.5 %.

关 键 词：模拟集成电路 动态比较器 中和技术 回踢噪声 流水线ADC 

分 类 号：TN432[电子电信—微电子学与固体电子学]