一款应用于GPS的CMOS低功耗高增益LNA  

A CMOS Low-Power and High-Gain LNA for GPS Application

作　　者：庄海孝[1] 马成炎[1,2] 殷明[2] 于云丰[1] 

机构地区：[1]中科院微电子研究所,北京100029 [2]杭州中科微电子有限公司,浙江杭州310053

出　　处：《微电子学与计算机》2009年第6期206-209,212,共5页Microelectronics & Computer

摘　　要：针对当前应用于GPS射频前端的LNA存在的不足,设计了一种新型的LNA.从电路结构、噪声匹配、线性度、阻抗匹配、电压增益以及功耗等方面详细讨论了该低噪声放大器的设计.电路采用CMOS0.18μm工艺实现,经过测试,低噪声放大器的增益为40.8dB,噪声系数为0.525dB,P1dB为-29.5dBm,1.8V电压下的消耗电流仅为1.4mA.电路性能充分满足应用要求.Considered present drawback on LNA applied to GPS receiver, the author designs a novel LNA structure. From the aspects of circuit structure, noise matching, linearity, impedance matching and gain, the design methodology of the integrated low noise amplifier are presented in detail, the circuit has been designed with a CMOS 0.18μm process, the voltage gain of the LNA is 40.8dB, the noise figure is 0. 525dB, the PldB is - 29.5dBm, and the circuit takes only 1. 4mA from a 1.8V supply. The circuit can satisfy the requirements very well.

关 键 词：GPS接收芯片 射频前端 低噪声放大器 电压增益 功耗 

分 类 号：TN722.3[电子电信—电路与系统]