级联梳状积分滤波器的原理及FPGA实现  

The principles and FPGA implementation of the Integrator Cascade Comb filter

作　　者：万婷婷[1] 孙丽华[1] 

机构地区：[1]南昌大学信息工程学院,南昌330031

出　　处：《微计算机信息》2009年第17期236-237,共2页Control & Automation

摘　　要：在软件无线电的下变频模块中,级联梳状积分滤波器有着重要的应用,其主要作用是信号的抽取与低通滤波。文中总结了级联梳状积分抽取滤波器的理论要点,并介绍了采用FPGA的滤波器设计方法,给出了仿真结果,并加以分析,从而证实了设计的可靠性和可行性。The Cascade integrator comb filter （CIC） has played an important role as an interpolating and low pass filter in the Digital Down Converter （DDC） of software radio. This paper summarizes the theory of CIC filter and introduces the design of the filter with FPGA, as well as the simulation results with analyses to verify the reliability and feasibility of the design.

关 键 词：级联梳状积分滤波器 数字下变频 FPGA 

分 类 号：TN713[电子电信—电路与系统]