基于FPGA的12通道GPS数字相关器设计  

Design of 12-channel GPS digital correlator based on FPGA

作　　者：滕依良[1] 陈佳品[1] 李振波[1] 

机构地区：[1]上海交通大学微纳科学技术研究院薄膜与微细技术教育部重点实验室,上海200240

出　　处：《计算机工程与设计》2009年第12期2826-2829,共4页Computer Engineering and Design

基　　金：国家863高技术研究发展计划基金项目(2007AA04Z340);国家自然科学基金项目(60475037);教育部博士点基金项目(20060248057)

摘　　要：分析了传统全球定位系统(GPS)接收机中相关器芯片的功能特点,提出一种基于现场可编程门阵列(FPGA)的GPS算法快速验证平台。采取模块化设计方法,在FPGA上使用硬件描述语言编码实现12通道数字相关器的功能逻辑,并利用ARM微控制器对相关结果进行基带处理,完成对GPS卫星信号的载波解调、C/A码跟踪以及导航电文解码,给出了对实时运行结果的分析。该数字相关器在提供较高定位精度的同时,其各个功能模块可以即时修改和测试,大大缩短了信号处理算法的开发周期。The function features of the traditional correlator in global positioning system receiver are analyzed. A new verification platform for GPS algorithm based on field programmable gate array （FPGA） is proposed. The hardware description language is adopted to realize the functional logic ofthe 12-channeldigitalcorrelatorinFPGA. And an ARM micro-processor is used to process the correlation data in baseband. The demodulation of the carrier wave, tracking of the C/A code and navigation decoding are accomplished and the analyses of the real-time running results are given out. It proves that this correlator can provide a high-precision positioning. As the function modules is improved and tested immediately, the development cycle for signal processing algorithm is reduced greatly.

关 键 词：全球定位系统 数字相关器 现场可编程门阵列 数控振荡器 跟踪环路 

分 类 号：TP368[自动化与计算机技术—计算机系统结构]