载流子寿命对Si基光电子器件性能的影响  

Influence of Carrier Lifetime on Silicon-Based Optoelectronics Devices

作　　者：孙阳[1] 徐学俊[1] 陈少武[1] 

机构地区：[1]中国科学院半导体研究所集成光电子学国家重点实验室,北京100083

出　　处：《微纳电子技术》2009年第6期335-339,345,共6页Micronanoelectronic Technology

基　　金：973计划课题(2007CB613405);国家自然科学基金资助项目(60877013;60837001)

摘　　要：研究了载流子寿命对SOI有源光波导器件工作性能的限制及影响,分析了制约载流子寿命减小的若干因素,综述了采用合理设计减小波导截面尺寸参数、脊区内植入He离子、加入pin结构施加反向偏压等几种有效减少载流子寿命的方法,并给出了它们各自的理论基础和文献报道的理论模拟与实验结果。经过对各种方法的利弊进行分析比较,作者认为在提高光电子器件性能的研究中,采用减小波导截面尺寸参数的方法要同时兼顾传输损耗的变化;采用离子植入法可以在不改变波导尺寸的情况下减小载流子的寿命,但引入了附加损耗且与CMOS工艺不相兼容;而外加pin结构的方法不适用于已经存在电学结构的器件。The carrier lifetime of the SOI active optical waveguide devices and its limitations and impacts on the device performance are studied. And the factors restricting the carrier lifetime to reduce are pointed out. Then, three approaches to effectively reduce carrier lifetime are introduced, rationally designing the parameters of waveguide cross-section, He＋ ion implanting into waveguide core region, and applying pin structure with reverse bias. Their theories, simulations and experimental results are also given. The advantages and disadvantages of each method are analyzed and compared. In the research of improving the performance of optical-electronic devices, it is pointed out that reducing the parameter of the waveguide should be considered with the change of transmission loss simultaneously, ion implanting method could reduced the carrier lifetime without changing the waveguide parameters, but it is not compatible with the CMOS process and will introduce additional loss, and applying the pin structure is not suitable for the devices already existing electrical structure. The analysis of carrier lifetime and the strategy on how to reduce the carrier lifetime with as less as possible side effects will be useful and helpful to improve the performance of optoelectronic devices.

关 键 词：载流子寿命 双光子吸收 自由载流子吸收 Si基光波导 离子植入 PIN结构 

分 类 号：TN252[电子电信—物理电子学] TN304.12