时频二维搜索捕获算法及其FPGA实现  

A Novel Acquisition Algorithm Based on Parallel Search in Time and Frequency Domain and FPGA Implementation

作　　者：吴高进[1] 邹永忠[1] 谭敏强[1] 

机构地区：[1]北京邮电大学信息与通信工程学院,北京100876

出　　处：《北京邮电大学学报》2009年第3期91-95,共5页Journal of Beijing University of Posts and Telecommunications

基　　金：国家科技支撑计划项目(2007BAH05B02-04)

摘　　要：为提高捕获速度且减小资源消耗,以"多段匹配滤波器+快速傅里叶变换(FFT)"架构为基础,提出并实现了一种新的适用于高动态下全球定位系统(GPS)P码直捕的时频二维并行搜索算法,其新颖性在于采用"折叠滤波器+重排序随机存取存储器(RAM)"结构实现了多段匹配滤波器,并在现场可编程门阵列(FPGA)中全并行地实现了捕获算法.采用流水线结构的硬件实现表明,新算法占用的资源约为原来的1/16.仿真结果和实际测试都表明,该算法在GPS高动态下能更快完成P码直捕.Based on the framework of ＂Multi-bank matched filter ＋ FFT＂, a new acquisition algorithm is proposed and implemented to accelerate acquisition speed and decrease resources consumption, it is based on time and frequency domain parallel search and applicable to P code direct acquisition in global positioning system （GPS） high dynamic situation. Its advantage is multi-bank matched filter＇s implementation in the structure of ＂folded filters ＋ re-order RAM＂ and its field-programmable gate array（FPGA） implementation in parallel. The pipelined implementation shows that the new algorithm occupies about 1/16 of the old one. Simulation and field test show that the algorithm improves P code direct acquisition performance in GPS high dynamic situation.

关 键 词：捕获 匹配滤波器 折叠滤波器 现场可编程门阵列 

分 类 号：TN911.72[电子电信—通信与信息系统]