一种密钥可配置的DES加密算法的FPGA实现  

FPGA implementation of DES encryption arithmetic with dynamic key management

作　　者：姚霁[1] 刘建华[1] 范九伦[1] 

机构地区：[1]西安邮电学院信控系,陕西西安710121

出　　处：《电子技术应用》2009年第7期145-148,共4页Application of Electronic Technique

摘　　要：在传统的DES加密算法的基础上,提出一种对密钥实行动态管理的硬件设计方案,给出了其FPGA实现方法。通过对DES加密原理的分析,利用其子密钥的生成与核心算法相关性较弱的特点,对密钥进行重新配置。DES算法采用资源优先方案,在轮函数内部设置流水线架构,提高了整体处理速度;在FPGA上实现轮函数和密钥变换函数独立运算,减少了相邻流水线级间的逻辑复杂度,从而实现了DES算法在FPGA条件下的重构设计。最终通过对设计结果的功能仿真和测试分析,论证了整个设计的正确性。The thesis puts forward a hardware design scheme of dynamic key management based on the traditional DES encryption arithmetic. The scheme will re-configure the key based on the analysis of the prineipium of DES encryption and the weak relativity between the generation of sub-key and the critical arithmetic. The DES arithmetic adopts the methodology of preferential resources and sets up the pipelining architecture inside the round-function. Thus it can improve the speed of whole system. The thesis implements the operation of round-function and key-transform function based on the FPGA. This can reduce the logic complication of adjacent pipeline and implement the re-configuration design of DES arithmetic on FPGA. Finally, the thesis finishes the whole function simulation and test analysis based on the design, argument of the correction of the whole system.

关 键 词：DES 线性反馈移位寄存器 混沌加密 FPGA 

分 类 号：TP309.7[自动化与计算机技术—计算机系统结构]