基于CPLD和单片机的脉冲计数器设计与实现  

Design of Pulse Counter Based on CPLD and SCM

作　　者：赵红赟[1] 张友鹏[1] 郑伟[1] 

机构地区：[1]兰州交通大学自动化与电气工程学院

出　　处：《北京电子科技学院学报》2009年第2期82-88,共7页Journal of Beijing Electronic Science And Technology Institute

摘　　要：脉冲计数器是数字电路中的一个典型应用,论文综合CPLD与单片机各自的优势,介绍了一种CPLD+STC89LE52脉冲计数器的设计方案并加以实现。该脉冲计数器具有CPLD高速、稳定的特性又具备单片机控制灵活方便,易于编程实现交互性等特点,克服了用纯硬件电路实现可靠性低、延时大以及CPLD+HDL编程实现交互性困难等缺陷,经过实际电路测试,该系统性能达到了设计要求。Pulse counter is a typical application of digital circuit. Combining advantages of CPLD and SCM, the article introduces a design and realization of pulse counter which bases on single - chip microcomputer of STC89LE52 and CPLD. The pulse counter has the characteristics of high speed, stability and has the feature of flexible, convenient to implement better interactive by programming. It overcomes the major flaws such as low reliability, long delays of pure hardware circuit and difficult to achieve good interactive by programming with CPLD plus HDL. After actual testing, the system＇s performance can meet the requirements.

关 键 词：脉冲计数器 可编程逻辑器件 单片机 

分 类 号：TP332.3[自动化与计算机技术—计算机系统结构]