高阶锁相环系统的设计与仿真  

Design and Simulation of High-Order PLL

作　　者：胡骥[1] 王宇光[1] 文连国[1] 裴泽[1] 

机构地区：[1]中国电子科技集团公司第三十六研究所

出　　处：《通信对抗》2009年第2期53-56,共4页Communication Countermeasures

摘　　要：对高阶环系统进行分析和推导,针对一种二阶有源积分的环路滤波器形式,提出了一种三阶锁相环的设计方法,并利用ADS等工具进行仿真和优化,采用CAD手段实现了高阶环的设计与性能仿真。In this paper, the high- order PLL system was investigated and deduced. A method to design the three- order PLL system using a two- order active integral loop filter was put forward. The tools of ADS are used to simulate and optimize the three- order PLL system to realize a CAD way of the high- order PLL design and simulation

关 键 词：高阶锁相环 杂散抑制 锁相环仿真 

分 类 号：TN927.23[电子电信—通信与信息系统] N94[电子电信—信息与通信工程]