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作 者:奚经天 闫娜 车文毅 徐琮辉 王肖 杨玉庆 菅洪彦 闵昊
机构地区:[1]State Key Laboratory of ASIC & System Auto-ID Laboratory, Fudan University
出 处:《Journal of Semiconductors》2009年第7期137-142,共6页半导体学报(英文版)
摘 要:This paper presents an EPC Class 1 Generation 2 compatible tag with on-chip antenna implemented in the SMIC 0.18 μm standard CMOS process.The UHF tag chip includes an RF/analog front-end, a digital baseband, and a 640-bit EEPROM memory.The on-chip antenna is optimized based on a novel parasitic-aware model.The rectifier is optimized to achieve a power conversion efficiency up to 40% by applying a self-bias feedback and threshold compensation techniques.A good match between the tag circuits and the on-chip antenna is realized by adjusting the rectifier input impedance.Measurements show that the presented tag can achieve a communication range of 1 cm with 1 W reader output power using a 1 × 1 cm2 single-turn loop reader antenna.This paper presents an EPC Class 1 Generation 2 compatible tag with on-chip antenna implemented in the SMIC 0.18 μm standard CMOS process.The UHF tag chip includes an RF/analog front-end, a digital baseband, and a 640-bit EEPROM memory.The on-chip antenna is optimized based on a novel parasitic-aware model.The rectifier is optimized to achieve a power conversion efficiency up to 40% by applying a self-bias feedback and threshold compensation techniques.A good match between the tag circuits and the on-chip antenna is realized by adjusting the rectifier input impedance.Measurements show that the presented tag can achieve a communication range of 1 cm with 1 W reader output power using a 1 × 1 cm2 single-turn loop reader antenna.
关 键 词:RFID TAG on-chip antenna RECTIFIER LOW-COST LOW-POWER
分 类 号:TP391.44[自动化与计算机技术—计算机应用技术]
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