采用0.18 μmCMOS工艺超宽带低噪声放大器的设计(英文)  

Design of an Ultra-Wideband Low Noise Amplifier in a 0.18μm CMOS

作　　者：汪小军[1] 黄风义[1] 田昱[1] 唐旭升[1] 王勇[1] 

机构地区：[1]东南大学信息科学与工程学院射频与光电研究所,南京210096

出　　处：《电子器件》2009年第3期579-582,共4页Chinese Journal of Electron Devices

基　　金：国家自然科学基金资助(60771022);国家863计划资助(2007AA01Z2b1);江苏省"六大人才高峰计划"资助(06-E-045);教育部博士点基金资助(20070286002)

摘　　要：提出了一个采用TSMC 0.18μmCMOS工艺设计的,工作频段为3.1～5.2GHz的超宽带低噪声放大器。放大器采用了前置带通滤波器的并联负反馈共源共栅结构,并从宽带电路,高频电路器件选择等方面讨论了超宽带低噪声放大器的设计,结果表明,在整个工作频段,电路输入输出匹配S11,S22均小于-14dB,最高增益为15.92dB,增益波动为1.13dB,电路工作电压为1.8V,功耗为27mW,噪声系数NF为1.84～2.11dB。This paper presents a 3. 1-5.2 GHz ultra-wideband low noise amplifier （LNA） with a band-pass filter in the front of shunt feedback cascode topology fabricated in TSMC 0. 18 μm CMOS process. More efforts are made on the wideband circuit and the choice of device in the high frequency. Consuming 27 mW from a 1.8 V power supply, simulation results show that S11 and S22 of circuit are lower than -14 dB, peak gain is 1.13 dB, flatness of gain is 15. 92 dB and the noise figure of the LNA is from 1.84 dB to 2. 11 dB over a full working band.

关 键 词：超宽带 低噪声放大器 并联负反馈 并联峰化 切比雪夫滤波器 

分 类 号：TN402[电子电信—微电子学与固体电子学]