锁相式频率合成器相位噪声分析与仿真  

Phase Noise Analysis and Simulation of PLL Frequency Synthesizer

作　　者：张福洪[1] 陶士杰[1] 栾慎吉[1] 

机构地区：[1]杭州电子科技大学通信工程学院,杭州310018

出　　处：《电子器件》2009年第3期608-611,共4页Chinese Journal of Electron Devices

摘　　要：相位噪声是影响频率合成器性能的重要指标,首先分析了锁相式频率合成器各个组成部分的相位噪声,然后根据相位噪声传输函数,建立了频率合成器相位噪声的精确仿真预测模型。为了验证仿真方法的可靠性,设计了一个输出频率为2GHz的频率源,实验测得的相位噪声曲线和仿真结果非常吻合。Phase noise is one of the most important targets for a frequency synthesizer. Starting with the analysis ot the phase noise source within the PLL frequency synthesizer, the accurate phase noise prediction and simulation model which is based on the phase noise transmission function had been proposed. In order to demonstrate the validity of this model, a frequency synthesizer of 2 GHz output frequency had been designed, and the measured phase noise curve had indicated a good agree with the simulation results.

关 键 词：锁相环 频率合成器 相位噪声 仿真 

分 类 号：TN733[电子电信—电路与系统]