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作 者:杨峰[1] 蒋祥顺[1] 胡剑浩[1] 李少谦[1]
机构地区:[1]电子科技大学通信抗干扰技术国家重点实验室,成都610054
出 处:《电子测量与仪器学报》2009年第7期63-67,共5页Journal of Electronic Measurement and Instrumentation
基 金:国家自然科学基金(编号:60496313)资助项目
摘 要:对纳秒级的超宽带脉冲信号进行采样需要设计采样速率高达数十GHz,且必须具有较低功耗的超高速模数变换器,提出了一种频域模数变换的方法,使超宽带脉冲信号通过一个频域滤波器组,并采用一组低速模数变换器在频域对脉冲信号并行采样,大大地降低了接收机对前端模数变换器采样速率的要求。并给出了频域同步、频域信道估计和频域解调的设计算法,计算机仿真结果证明了在能够大大降低采样速率的情况下,频域采样超宽带脉冲通信接收机具有和传统时域高速采样接收机相近的误码率性能。The most challengeable job in the design of digital UWB receiver is the design of an ultra-high speed ADC in the order of tens of gigahertz with low power consumption. In this paper, a frequency domain parallel sampling method is proposed, which can greatly reduce the ADC sampling speed. The frequency domain ADCs are composed of analog filter banks followed by lower speed ADCs. The analog filter banks can be implemented using simple bi-quad filters. Therefore, the digital UWB receiver can be easily implemented in CMOS technology of low complexity. Fre- quency domain synchronization, channel estimation and demodulation algorithms are also provided. The simulation results show that under much lower sampling speed, the frequency domain UWB receiver can achieve BER perform- ance comparable with conventional high sampling speed digital UWB receiver.
分 类 号:TN92[电子电信—通信与信息系统]
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