三阶1-1-1级联Σ-Δ调制器的设计及仿真  

Design and Simulation of a 3^(rd)-Order 1-1-1 Cascaded Σ-Δ Modulator

作　　者：浦寿杰[1] 顾晓峰[1] 李杨先[1] 徐波[1] 于宗光[1,2] 

机构地区：[1]江南大学信息工程学院,江苏无锡214122 [2]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《微电子学》2009年第4期529-531,545,共4页Microelectronics

基　　金：科技部科技型中小企业技术创新基金(07C26223201317);教育部新世纪优秀人才支持计划(NCET-06-0484);江苏省自然科学基金资助项目(BK2007026)

摘　　要：采用MASH结构,设计了一款三阶(1-1-1)级联Σ-Δ调制器;讨论了各个模块的增益系数,设计了数字校正电路,并运用Matlab/Simulink对调制器进行了行为级仿真。当输入信号带宽为20 kHz,过采样比为64时,仿真模型得到87.7 dB的信噪比,精度为14.28位。与其他结构的调制器相比,该调制器更加稳定,动态范围更大,可应用于处理音频信号的A/D转换器。A 3rd-order （1-1-1） cascaded sigma-delta modulator with MASH structure was designed. Gain coefficients of each module were derived, and a digital correction circuit was designed. Behavioral simulation was performed on the modulator using Matlab/Simulink. Simulation results showed that, with this model, 87. 7 dB of SNR and 14. 28-bit of resolution were achieved for an input signal bandwidth of 20 kHz and an over-sampling rate of 64. Compared with other structures, the proposed modulator exhibits higher stability and larger dynamic range, and it can be used in A/D converters for audio signal processing.

关 键 词：∑-△调制器 级联结构 增益系数 

分 类 号：TN761[电子电信—电路与系统]