基于多字节流水线的POS信号IP包提取算法  

An Algorithm of IP Packet Capture from POS Signal Based on Multi-Byte and Pipeline Processing

作　　者：左震[1] 张羿猛[1] 唐贵林[1] 黄芝平[1] 

机构地区：[1]国防科学技术大学机电工程与自动化学院,湖南长沙410073

出　　处：《测试技术学报》2009年第4期337-342,共6页Journal of Test and Measurement Technology

摘　　要：针对当今骨干网传输速率较高,现有的硬件设备很难对POS信号直接进行面向字节的IP包提取的问题,本文提出了一种便于FPGA(Field Programmable Gate Array)实现的基于多字节流水线的IP包提取算法,实现了对骨干网POS信号的线速处理.理论分析和实际测试都表明,该方法适应了骨干网数据的高速、大容量的特点,能够满足当前以及今后高速光纤通信中数据提取的需要.As the transmission speed of the current backbone network is very high, it is hard for the hardware device to capture IP packets from the POS signal with single-byte processing. This paper provides an algorithm of IP packet capture from POS signal based on multi-byte and pipeline processing, which can be easily realized on a FPGA processor and guarantee line speed processing of the backbone POS signal. Both theoretical analysis and experimental test prove that this algorithm suits the high- speed, large-amount characteristic of the backbone data and can satisfy the need of data capture from current and future high-speed fiber backbone network.

关 键 词：多字节 流水线 IP包提取 POS 现场可编程门阵列(FPGA) 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]