基于FPGA的IIR数字滤波器的设计与仿真  

Design of IIR Digital Filter Based on FPGA

作　　者：屈星[1] 唐宁[1] 严舒[1] 杨白[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《计算机仿真》2009年第8期304-307,348,共5页Computer Simulation

摘　　要：提出一种在FPGA中实现高速IIR数字滤波器的方法,在理论上分析了IIR数字滤波器系数取整后的稳定性问题;利用FDATool设计滤波器,在Matlab中编程仿真;使用实验仿真的方法确定IIR滤波器系数量化字长,保证了IIR滤波器性能和硬件资源的优化,使IIR滤波器能适用高速场合,研究了FPGA中运算部件的运算特点,采用Verilog硬件描述语言实现迭代运算及有符号数乘法;最后编程实现IIR数字滤波器,通过QuartusII仿真并在FPGA上实现。通过试验验证,该方法设计的IIR数字滤波器收敛,能适用于对实时性要求高的系统中。A method of designing high speed digital filter based on FPGA is put forward, and the effect on the stability of IIR digtial filter after rounding the coefficients is discussed theoretically. The filter is designed by using FDATool,and procedures are programmed and simulated in Matlab. Simulation method is adopted to determine IIR digital filter＇s coefficient quantified worllength, and it ensures that IIR digital filter＇s performance and hardware resource are optimized, thus making IIR digital filter suitable for high speed system. The operational features of operational parts in FPGA, are investigated, and Verilog hardware description language is used to realize the iterative operation and signed multiplication. Finally, detail design of program is given. The program is simulated in QuartruslI software tools, and is realiazed based on FPGA. Experiment has proved that IIR digital filter implemented by this method is convergent, and is suitable for the system having strict real -time requirements.

关 键 词：现场可编程门阵列 无限长脉冲响应数字滤波器 硬件描述语言 数字信号处理 

分 类 号：TN911[电子电信—通信与信息系统]